Digital Systems & Microprocessor Design (H7068)
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Digital Systems and Microprocessor Design
Module H7068
Module details for 2024/25.
15 credits
FHEQ Level 5
Module learning outcomes
Have knowledge of combinational and sequential design concepts and their design application methods.
Demonstrate the ability to apply combinational and sequential concepts through the use of design and VHDL coding, outside of the context in which they were first studied.
Have critical understanding of the digital processes in low-complexity microprocessor systems.
Demonstrate practical skills in the use of a modern suite of EDK software and target hardware.
| Type | Timing | Weighting |
|---|---|---|
| Computer Based Exam | Semester 1 Assessment | 60.00% |
| Coursework | 40.00% | |
| Coursework components. Weighted as shown below. | ||
| Test | T1 Week 2 | 5.00% |
| Project | T1 Week 11 | 75.00% |
| Test | T1 Week 4 | 5.00% |
| Test | T1 Week 8 | 5.00% |
| Test | T1 Week 10 | 5.00% |
| Test | T1 Week 6 | 5.00% |
Timing
Submission deadlines may vary for different types of assignment/groups of students.
Weighting
Coursework components (if listed) total 100% of the overall coursework weighting value.
| Term | Method | Duration | Week pattern |
|---|---|---|---|
| Autumn Semester | Laboratory | 2 hours | 11111111111 |
| Autumn Semester | Lecture | 1 hour | 11111111111 |
| Autumn Semester | Lecture | 2 hours | 11111111111 |
How to read the week pattern
The numbers indicate the weeks of the term and how many events take place each week.
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The 5XÉçÇøÊÓƵ reserves the right to make changes to the contents or methods of delivery of, or to discontinue, merge or combine modules, if such action is reasonably considered necessary by the 5XÉçÇøÊÓƵ. If there are not sufficient student numbers to make a module viable, the 5XÉçÇøÊÓƵ reserves the right to cancel such a module. If the 5XÉçÇøÊÓƵ withdraws or discontinues a module, it will use its reasonable endeavours to provide a suitable alternative module.